Раздел: Документация
0 ... 186 187 188 189 190 191 192 ... 235 (region (rect s2 2.0 2.0 6.0 6.0) (rule (width 0.003))) ) ) <reorder descriptor> Переопределение последовательности цепей. <reorder descriptor>: :=(reorder<order type>) < reserved 3ayer name > Зарезервированное имя слоя. <reserved layer name>: : = (pcb signal power] i <resistance resolution descriptor> Электрическое сопротивление. <resistance resoluti n descriptors : = (resistance resolution Jkohm. ohm mohm < positive integer>) <resolution descriptor> Измеряемая величина. <resolution descriptor>: : = (resolution <diraension unit> < positive integer>) •crooro descriptor> Комната. PIACE <roort\ descriptor>;: = (room < roon\ id> <shape descriptor> ]] [{<room rule descriptor>}] I <roonvjplace rule descr iptor > ] ) <room place xul<* dascriptor> Правила размещения для комнаты. PLACE < rooin j?lace rule descriptor>: : = (place rule [ <room jplace. rule object>] [<spacing descriptor> <permit orient descriptor> I <permit side descriptox> I <opposi te side descriptor>] ) <room place rule obiect> Правила для объектов в комнате. place <roon\ place rule object>:: = (6bject type [room jroom image set [large I small I discrete I capacitor] [<iinage tvpe [smd ipin]) ] ] ) <room rule descriptor> Правила для комнаты. PLACE <room rule descriptor> :: = [ (height <max height> [ <min height>]) I (power {< net id>)) (power dissipation [ -1 < real>] ] {<include descriptor>) I { <exclude descriptor>)] <rotation> Угол поворота. <rotation>::= < real> < route descriptor> Определение трассировки. <route descriptor>::= (routes <resolution descriptor> <parser descriptor> <structurei out descriptor> <1ibrary out descriptor> <network out descriptor> <test points descriptor>) <route file descriptor> Файл трассировки. <route file descriptor>::=<route descriptor> <route to f*nout only deecriptor> Трассировка только до переходного отверстия стрингера. <route to fanout only descriptor>: : = (route to f*nout only [on off ] 1 <rule descriptor* <rule descriptor>::=(rule { <rule descriptors>)) <rule descriptors* Описания правил. <rule descriptors>::= (<clearance descriptor> I FflT <effectivevia length descriptor> I FST <interlayer clearance descriptor> J <junction type descriptor> j FST <length amplitude descriptor> FST <length factor descriptor> I FST <length gap jdescriptor> I <linut bends descriptor> I <limit crossingdescriptor> <limit vias descriptor> I <limit way descriptor> FST <ma3noise descriptor> I <max stagger descriptor.> I <max stub, descr iptor > <maxL total vias descriptor> I FST {<parallel noise descriptor>} I FST {<parallel segment descriptor>} I <pin width taper descriptor> I <power fanout descriptor> I <redundant wiring descriptor> I <reorder descriptor> I FST <shield gap descriptor> I FST <shield loop descriptor> I 0 ... 186 187 188 189 190 191 192 ... 235
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